Computer Architecture and Organization
Previous year question paper with solutions for Computer Architecture and Organization from 2014 to 2018
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Section A:
Boolean algebra and Logic gates, Combinational logic blocks(Adders, Multiplexers,
Encoders, de-coder), Sequential logic blocks(Latches, Flip-Flops, Registers, Counters) Store
program control concept, Flynn’s classification of computers (SISD, MISD, MIMD);
Multilevel viewpoint of a machine: digital logic, micro architecture, ISA, operating systems,
high level language; structured organization; CPU, caches, main memory, secondary memory
units & I/O; Performance metrics; MIPS, MFLOPS.
Section B: Instruction Set Architecture:
Instruction set based classification of processors (RISC, CISC, and their comparison);
addressing modes: register, immediate, direct, indirect, indexed; Operations in the instruction
set; Arithmetic and Logical, Data Transfer, Control Flow; Instruction set formats (fixed,
variable, hybrid); Language of the machine: 8086 ; simulation using MSAM.
Section C: Basic non pipelined CPU Architecture and Memory Hierarchy & I/O
Techniques
CPU Architecture types (accumulator, register, stack, memory/ register) detailed data path of
a typical register based CPU, Fetch-Decode-Execute cycle (typically 3 to 5 stage);
microinstruction sequencing, implementation of control unit, Enhancing performance with
pipelining.
The need for a memory hierarchy (Locality of reference principle, Memory hierarchy in
practice: Cache, main memory and secondary memory, Memory parameters: access/ cycle
time, cost per bit); Main memory (Semiconductor RAM & ROM organization, memory
expansion, Static & dynamic memory types); Cache memory (Associative & direct mapped
cache organizations.
Section D: Introduction to Parallelism and Computer Organization [80x86]:
Goals of parallelism (Exploitation of concurrency, throughput enhancement); Amdahl’s law;
Instruction level parallelism (pipelining, super scaling –basic features); Processor level
parallelism (Multiprocessor systems overview).
Instruction codes, computer register, computer instructions, timing and control, instruction
cycle, type of instructions, memory reference, register reference. I/O reference, Basics of
Logic Design, accumulator logic, Control memory, address sequencing, micro-instruction
formats, micro-program sequencer, Stack Organization, Instruction Formats, Types of
interrupts; Memory Hierarchy.
PTU
PU
- BCOM |
- BA/BSC |
- BCA |
- MA |
- PGDCA |
- MCOM |
- MSC-Math |
- Addon |
- BBA |
- B-ARCH |
- B-LIB |
- B-EDU |
- B-PHAR |
- BA-HONS-ECON |
- BA-HONS-SS |
- BE |
- MA-Punjabi |
- MA-English |
- MA-History |
- MCA |
- MBA |
- MBA-CIT |
- MBA-Executive |
- MCOM-AF |
- MCOM-BE |
- MCOM-BI |
- MCOM-MEFB |
- BSC-Agri |
- BSC-FD |
- BSC-HS |
- ME-CSE |
- ME-IT |
- ME-ME |
- ME-ECE |
- MSC-Chemistry |
- MSC-Physics |
- MSC-Botany |
- MSC-Zoology |
- MA-Economics |
- MA-Hindi |
- LLB |
- BPED |
- LLM |
- BFA |
- B. Voc |
- BHM |
- BTM |
- M. Arch |
- M. Pharm |
- MFA |
- MTM |
- MHM |
- M.ED |
- M-Lib |
- MPED |
- MFDM |
- MGL |
- Shastri |
- M.TECH |
- ME-CHEMICAL |
- ME-FT |
- ME-ELECTRIC |
- M.TECH-ME |
- M.TECH-NN |
- M.E-BIO |
PU-PATIALA
- BCA |
- BBA |
- MBA |
- MCOM |
- BCOM |
- BCOM-HONS |
- BSC-NM |
- BA |
- B.EDU |
- BSC-AGRI |
- BA-B.EDU |
- BLIB |
- MSC-IT |
- PGDCA |
- MSC-MB |
- MSC-physics |
- BA-ENGLISH |
- MA-Punjabi |
- MSC-chemistry |
- MSC-maths |
- BSC-Medical |
- MSC-FDT |
- MSC-FN |
- MSC-BT |
- BSC-Hons-BT |
- BSC-CS |
- BSC-Hons-Math |
- BSC-CSM |
- BSC-FT |
HPTSB
- Diploma |