SECTION-A
Introduction to Computer Organization: Introduction to Computer and CPU
(Computer Organization, Computer Design and Computer Architecture), Stored
Program Concept- Von Neumann Architecture. Introduction to Flynn’s ClassificationSISD,
SIMD, MIMD
Register Transfer and Micro operations- Introduction to Registers, Register Transfer
Language, Data movement among Registers and Memory.
Micro operations: Introduction to micro operations, Types of micro operations--Logic
Operations, Shift operations, Arithmetic and Shift operations.
Common Bus System : Introduction to Common Bus System, Types of Buses(Data
Bus, Control Bus, Address Bus), 16 bit Common Bus System--Data Movement among
registers using Bus. (09)
SECTION-B
Basic Computer Instructions- Introduction to Instruction, Types of Instructions
(Memory Reference, I/O Reference and Register Reference), Instruction Cycle,
Instruction Formats (Direct and Indirect Address Instructions, Zero Address, One
Address, Two Address and Three Address Instructions)
Interrupt: Introduction to Interrupt and Interrupt Cycle.
Design of Control Unit: Introduction to Control Unit, Types of Control Unit (Hardwired
& Micro programmed Control Unit).
Addressing Modes-Introduction & different types of Addressing Modes. (09)
SECTION-C
I/O Organization: I/O Interface Unit, types of ports (I/O port, Network Port, USB port,
Serial and Parallel Port), Concept of I/O bus, Isolated I/O versus Memory Mapped I/O.
I/O Data Transfer Techniques: Programmed I/O, Interrupt Initiated I/O, DMA Controller
and IOP.
Synchronous and Asynchronous Data Transfer: Concept of strobe and
handshaking, source and destination initiated data transfer. (09)
SECTION-D
Stack Organization: Memory Stack and Register Stack
Memory organization: Memory Hierarchy, Main Memory (RAM and ROM chips,
Logical and Physical Addresses, Memory Address Map, Memory Connection to CPU),
AssociativeMemory
Cache Memory: Cache Memory (Initialization of Cache Memory, Writing data into
Cache, Locality of Reference, Hit Ratio), Replacement Algorithms (LRU and FIFO).
Cache Memory Mapping Techniques: Direct Mapping, Associative Mapping and SetAssociative
Mapping. Harvard Architecture, Mobile Devices Architecture (Android,
Symbian and Windows Lite), Layered Approach Architecture.